Digital System Evaluation Coursework Help
Course Details at a Glance
| Coursework Title | Digital System Evaluation |
|---|---|
| Module Name | Digital and Embedded System |
| Module Code | 5301ELE AND 5401ELE |
| Level | 5 |
| Credit Rating | 20 |
| Weighting | 15% |
| Programme | BEng Electrical and Electronics Engineering |
Lecturer Contact Details
| Lecturer | Tel | Room | |
|---|---|---|---|
| Dr. Princy Johnson | p.johnson@ljmu.ac.uk | 01512312588 | 5.18a, James Parson Building, Byrom Street |
| Mieke Sooi | r.m.sooi@ljmu.ac.uk | 01512315354 | 5.19b, James Parson Building, Byrom Street |
Key Dates
| Activity | Date | Submission Method |
|---|---|---|
| Issue Date | 10.10.2024 | – |
| Lab Demonstration Deadline | 31.10.2024 | Demonstration during lab session |
| Portfolio Submission | 08.11.2024 | Via Canvas |
| Feedback Date | Within 3 weeks of portfolio submission | Via Canvas & face-to-face |
Learning Outcomes
- LO1: Define electronic circuit operations and design.
- LO2: Design, analyze, and implement finite-state machine-based digital circuits.
Coursework Description
This assignment focuses on designing, implementing, and evaluating a digital system. You will apply the knowledge gained during lectures and labs to achieve the following:
- Lab Demonstration:
- Build a combinational logic circuit using one of the three approaches learned in the second digital lab.
- Connect the lower three bits of the divide-by-16 counter (asynchronous/ripple) using JK flip-flops.
- Demonstrate the correct operation at a high frequency using the Logisim environment, followed by hardware implementation.
- Portfolio Submission:
- Provide evidence of correct circuit operations.
- Compare different circuit designs in terms of:
- Propagation delay
- Cost of components
- Size of components (approx. transistor count)
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